會議論文

Conference papers

a.國際會議

  1. W. -T. Yeh, C. -L. Chang, S. -C. Yin and C. -H. Tsai, “Mixed-Level Design Methodology With SystemVerilog Behavior Models for Digitally Controlled Power Converter ICs," 2023 IEEE 12th Global Conference on Consumer Electronics (GCCE), Nara, Japan, 2023, pp. 1172-1175.
  2. L. Hsu, J. -C. Cheng, W. -T. Yeh and C. -H. Tsai, “A Wide Load Range and Low Current Distortion Digital Boost PFC Converter With Mixed Conduction Mode Operation," 2023 IEEE 12th Global Conference on Consumer Electronics (GCCE), Nara, Japan, 2023, pp. 1168-1171.
  3. Y. -C. Jian, K. -H. Lai, J. -W. Huang, W. -T. Yeh and C. -H. Tsai, “A Novel Cost Effective Variable On-Time Control of Digital Boost PFC Converter in Boundary Conduction Mode," 2023 IEEE 12th Global Conference on Consumer Electronics (GCCE), Nara, Japan, 2023, pp. 1176-1178.
  4. W. -T. Yeh, G. -S. Yao, C. -Y. Chen and C. -H. Tsai, “A 411nA Quiescent Current Hysteretic Buck Converter with Self-Control Biasing and Dynamic Voltage Scaling (DVS) for IoT Applications," 2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT), HsinChu, Taiwan, 2023, pp. 1-2.
  5. G-S Yao, Y-Y Tsai, K-Y Hu, C-Y Chen, K-H Lai and C-H Tsai, “All-Digital Current-Sensorless Multi-Mode DC-DC Converter for Battery Powered Applications," in IEEE 8th Global Conference on Consumer Electronics (GCCE), Osaka, Japan, 2019, pp. 1144-1145.
  6. C-P Niou, C-H Tsai, and T-J Chen, “A digital peak current delay compensation for primary-side regulation flyback adapter," in International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Hsinchu, 2018, pp. 1-4.
  7. H-C Lin, W-M Chu, C-H Tsai, and W-C Su, “A digitally variable on-time controlled PFC flyback converter with primary-side regulation," in 7th International Symposium on Next Generation Electronics (ISNE), Taipei, 2018, pp. 1-4.
  8. Y-H Chang, K-Y Hu, G-S Yao, C-Y Chen, and C-H Tsai, “Mixed-Level Design Methodology for Digitally Controlled Power Converter IC" in IEEE 7th Global Conference on Consumer Electronics (GCCE), 2018, pp. 175-178.
  9. K-Y Hu, Y-H Chen, H-C Lin, and C-H Tsai, “Digital Buck Converter with Adaptive Driving Circuit for Cascode Power MOS," in IEEE 7th Global Conference on Consumer Electronics (GCCE), 2018, pp. 811-812.
  10. K-Y Hu, Y-S Chen, and C-H Tsai, “A Digital Multiphase Converter with Sensor-less Current and Thermal Balance Mechanism," in IEEE Asian Solid-State Circuits Conference (A-SSCC), 2018, pp. 126-127.
  11. K-Y Hu, B-M Chen, and C-H Tsai, “Low transient voltage dual loop buck converter using digital charge control technique," in IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), Kuala Lumpur, 2017, pp. 53-56.
  12. K-S Chang and C-H Tsai, “Transient performance estimation of DLDO by building model in MATLAB Simulink," in IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia), Kuala Lumpur, 2017, pp. 57-60.
  13. K-Y. Hu, B-M. Chen, and C-H Tsai, “A digitally controlled buck converter with current sensor-less adaptive voltage positioning (AVP) mechanism," in International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Hsinchu, 2017, pp. 1-4.
  14. L-Y Lu et al. “A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling," 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Macau, 2016, pp. 17-18.
  15. K-Y Hu, Y-Y Tsai, S-M Wang, and C-H Tsai, “High Power Factor Boost PFC Controller with Feedforward Adaptive On-time Control," in IEEE 5th Global Conference on Consumer Electronics (GCCE), Kyoto, 2016, pp. 621-622.
  16. C-Y Huang, K-Y Hu, S-M Lin, and C-H Tsai, “Fast transient current mode dc-dc converter with optimized loop response," in IEEE International Future Energy Electronics Conference, 2015, pp. 1-4.
  17. J-T Lin, K-Y Hu, and C-H Tsai, “Digital multiphase buck converter with current balance/phase shedding control," in IEEE Region 10 Conference (TENCON), Macao, 2015, pp. 1-5.
  18. C-C Pao, Y-C Chen, and C-H Tsai, “Top-down methodology based low-dropout regulator design using Verilog-A," in IEEE International Conference on Solid-State and Integrated Circuit Technology, 2014, pp.1-3.
  19. C-H Teng and C-H Tsai, “A digital DC-DC buck converter with adaptive on-time PWM/PFM control," in IEEE International Conference on Solid-State and Integrated Circuit Technology, 2014, pp.1-3.
  20. J-T Lin, J-H Shiau, and C-H Tsai, “A Fast Transient and Under/Overshoot Suppression DC-DC Buck Converter with ACP Control," in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2014, pp. 1-4.
  21. Y-C Chang and C-H Tsai, “Predictive Digital Current Mode Controlled DC-DC Converter with Duty Calibration Technique," in IEEE International Future Energy Electronics Conference, 2013, pp. 316-319.
  22. C-Y Huang, S-F Kang, and C-H Tsai, “Design and Implementation of a Current-Mode DC-DC Converter for LED Driving," in IEEE International Future Energy Electronics Conference, 2013, pp. 436-439.
  23. J-S Guo, S-M Lin, and C-H Tsai, “A Hysteretic Boost Regulator with Emulated-Ramp Feedback (ERF) Current-Sensing Technique for LED Driving Applications," in IEEE Asian Solid-State Circuits Conference (A-SSCC), 2013, pp. 61-64.
  24. H-L Li, C-C Pao, B-M Chen, and C-H Tsai, “AOT-Controlled Dual-Mode AVP Buck Regulator with AEAF Mechanism," in IEEE Custom Integrated Circuit Conference (CICC), 2013, pp.1-4.
  25. C-Y Wang, J-S Guo, C-Y Huang, and C-H Tsai, “A High Efficiency DC/DC Boost Regulator with Adaptive Off/On-Time Control," in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2013, pp. 1-4.
  26. B-T Yeh, C-H Yang, K-C Juang, and C-H Tsai, “Sensorless Dead-Time Exploration for Digitally Controlled Switching Converters," in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2013, pp. 1-4.
  27. C-Y Huang, Y-C Chen, and C-H Tsai, “Integrated Single-Inductor Dual-Output DC-DC Converter with Power-Distributive Control," in IEEE International Symposium on Next-Generation Electronics, 2013, pp. 33-36.
  28. C-Y Huang, Y-T Chang, and C-H Tsai, “Design and Implementation of a Switching DC-DC Converter IC Using Sigma-Delta Modulator,” in International Conference on Anti-counterfeiting, Security, and Identification, 2012, pp. 1-5.
  29. G-L Li, Y-C Chen, Y-T Chang, C-H Tsai, and C-H Yang, “A Single-Inductor Dual-Output DC-DC Converter with Output Voltage Mode Switching,” in IEEE Workshop on Control and Modeling for Power Electronics, 2012, pp. 1-4.
  30. H-S Chen, C-H Yang, and C-H Tsai, “Design and Implementation of Window Delay-Line ADC for Low-Power DC-DC SMPS,” in IEEE Workshop on Control and Modeling for Power Electronics, 2012, pp. 1-4.
  31. C-S Huang, C-Y Wang, J-H Wang, and C-H Tsai, “A Fast-Transient Quasi-V2 Switching Buck Regulator Using AOT Control,” in IEEE Asian Solid-State Circuits Conference (A-SSCC), 2011, pp. 53-56.
  32. K-F Wong and C-H Tsai, “A Completely Smooth Transition Buck-Boost Converter with Continuity-Mode (CM) Technique for Only Using 2 Switches in Whole Battery Life,” in IEEE Power Electronics and Drive Systems, 2011, pp. 974-977.
  33. J-Y Liu, C-H Yang, and C-H Tsai, “Correlation-based system identification of digitally controlled SMPS,” in IEEE Power Electronics and Drive Systems, 2011, pp. 1149-1152.
  34. C-H Yang, C-W Mu, and C-H Tsai, “Synthesizable Wide Range DPWM with All-Digital PLL for Digitally-Controlled Switching Converter,” in IEEE Industrial Electronics Conference, 2011, pp. 1626-1630.
  35. C-S Huang, C-H Tsai, and J-H Wang, “Design and Verification of an Integrated Current Mode Switching Regulator,” in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2011, pp. 1-4.
  36. J-H Wang and C-H Tsai, “A Fast-Transient Low-Dropout Regulator with Current Feedback Buffer,” in Int. Sym. Next-Generation Electronics, 2010, pp. 170-173.
  37. C-H Yang, C-N Liu, C-H Tsai, “Direct Digital Compensator Design for Switching Converters,” in IEEE Int. Symp. Next-Generation Electronics, 2010, pp. 143-146.
  38. C-H Yang, J-H Shiau, C-H Tsai, “Programmable Reference for Power-Aware DVS,” in IEEE Int. Symp. Aware Computing, 2010, pp. 166-170.
  39. C-N Liu, C-H Yang, and C-H Tsai, “Digital Compensator Design for Power-Aware DC-DC Converters,” in IEEE Int. Symp. Aware Computing, 2010, pp. 177-180.
  40. J-H Wang, S-W Lai, C-S Huang, and C-H Tsai, “A Low Voltage and Low Ground Current Low-Dropout Regulator with Transient Enhanced Circuit for SoC,” in IEEE International Conference on Green Circuits and System, Jun. 2010, pp.428-431.
  41. H-S Jhuang, J-H Wang, and C-H Tsai, “A High PSR over Wideband Frequency Range Low Dropout Voltage Regulator,” in IEEE International Conference on Green Circuits and System, Jun. 2010, pp. 508-511.
  42. C-C Yeh, J-H Wang, and C-H Tsai, “An Output Buffer with Slew-Rate Calibration for Different TFT-LCD Loadings,” in IEEE International Conference on Green Circuits and System, Jun. 2010, pp. 512-515.
  43. J-H Wang, C-H Tsai, C-T Chang, and C-Y Wang, “An 8-bit LCD Source Driver with Push-Pull Low-Power Output Buffer Amplifiers,” in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Apr. 2010, pp. 327-330.
  44. W-H Chang, J-H Wang, and C-H Tsai, “A Peak-Current Controlled Single-Inductor Dual-Output DC-DC Buck Converter with a Time- Multiplexing Scheme,” in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), Apr. 2010, pp. 331-334.
  45. C-W Leng, C-H Yang, and C-H Tsai, “Digital PWM controller for SIDO Switching Converter with Time-Multiplexing Scheme,” in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2009, pp. 52-55.
  46. J-H Wang, H-Y Zheng, C-H Tsai, C-T Chang, C-C Lee, and C-Y Wang, “A Compact Rail-to-Rail Buffer with Current Positive-Feedback for LCD Source Driver,” in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2009, pp. 43-46.
  47. H-Y Zheng, J-H Wang, C-H Tsai, C-T Chang, C-C Lee, and C-Y Wang, “Area-Efficient R-C DACs with Low-Offset Push-Pull Output Buffers for a 10-bit LCD Source Driver,” in IEEE International Symposium on Circuits and Systems, 2009, pp. 1597-1600.
  48. P-K Leong, C-H Yang, C-W Leng, and C-H Tsai, “Design and Implementation of Sigma-Delta DPWM Controller for Switching Converter,” in IEEE International Symposium on Circuits and Systems, 2009, pp. 3074-3077.
  49. J-C Wu, C-W Mu, C-H Yang, and C-H Tsai, “Digitally Controlled Low-EMI Switching Converter with Random Pulse Position Modulation,” in IEEE Asian Solid-State Circuits Conference, 2009, pp. 341-344.
  50. W-H Chang, Y-H Jen, and C-H Tsai, “An Integrated Sigma-Delta Noise-Shaped Buck Converter,” in IEEE Power Electronics and Drive Systems, 2009, pp. 18-21.
  51. W-H Chang, H-W Chang, and C-H Tsai, “Integrated Single-Inductor Buck-Boost or Boost-Boost DC-DC Converter with Power-Distributive Control,” in IEEE Power Electronics and Drive Systems, 2009, pp. 1184-1187.
  52. C-C Yeh J-H Wang and C-H Tsai “A compact low-offset voltage and low power rail-to-rail output buffer for TFT-LCD panel” in IEEE Integrated Circuits,2009, pp. 372-375
  53. H-S Jhuang, J-H Wang, Z-Y Zeng and C-H Tsai “A low dropout linear regulator with high power supply rejection” in IEEE Integrated Circuits,2009, pp. 41-44.
  54. C-W Leng, C-H Yang, and C-H Tsai, “An Integrated GUI Design Tool for Digitally Controlled Switching DC-DC Converter,” in IEEE International Communications, Circuits and Systems, 2008, pp. 1324-1327.
  55. W-H Chang, Y-H Jen, and C-H Tsai, “An Integrated DCM Buck Converter with Peak-Current Mode Control,” in IEEE IEEE International Communications, Circuits and Systems, 2008, pp. 1061-1065.
  56. H-Y Chu, C-H Yang, C-W Leng, and C-H Tsai, “A Top-Down, Mixed-Level Design Methodology for CT BP ΔΣ Modulator Using Verilog-A,” in IEEE Asia-Pacific Conference on Circuits and Systems, 2008, pp. 1390-1393.
  57. J-H Wang, J-C Qiu, H-Y Zheng, C-H Tsai, C-Y Wang, C-C Lee, and C-T Chang, “A Compact Low-Power High Slew-Rate Rail-to-Rail Class-AB Buffer Amplifier for LCD Driver ICs,” in IEEE Electron Devices and Solid-State Circuits, 2007, pp. 397-400.
  58. S-I Liu, P-K Chen, and J-H Tsay, “Wide Range Linear Tunable BiCMOS Transconductor and Four-Quadrant Multiplier,” in Proc. IEEE Int. Symp. on Circuits and Systems, pp. 308-311, 1996.
  59. J-H Tsay, S-I Liu, and Y-P Wu, “Measuring the Threshold Voltage of a MOSFET with an Active Attenuator,” in Proc. IEEE Int. Symp. on Circuits and Systems, pp.397-400, 1996.
  60. K-Y Hu, C-H. Tsai and C-W Tsai, “Digital V2 Constant ON-Time Control Buck Converter With Adaptive Voltage Positioning and Automatic Calibration Mechanism," in IEEE Transactions on Power Electronics, vol. 36, no. 6, pp. 7178-7188, June 2021.

 

b.國內會議

  1. W. -T. Yeh, G. -S. Yao, C. -Y. Chen and C. -H. Tsai, “A 411nA Quiescent Current Hysteretic Buck Converter with Self-Control Biasing and Dynamic Voltage Scaling (DVS) for IoT Applications," 2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT), HsinChu, Taiwan, 2023, pp. 1-2.
  2. X-F Wu, W-T Yeh, C-Y Chen, M-X Cai, and C-H Tsai, “High-speed CMOS Half-Bridge Gate Driver for GaN-Based DC-DC Converter" in Proc. VLSI Design/CAD Symposium, 2023.
  3. Y-D Huang, W-T Yeh, C-Y Chen, J-C Cheng, and C-H Tsai, “Digital IC & DSP Controller Design for Boost Converter Base on SIMPLIS-VH/SIMetrix" in Proc. VLSI Design/CAD Symposium, 2023.
  4. M-X Cai, W-T Yeh, C-Y Chen, X-F Wu, and C-H Tsai, “Single-Inductor Bipolar-Output Converter with Tunable Power Distribution and Power-Efficient Skipping Control for AMOLED Application" in Proc. VLSI Design/CAD Symposium, 2023.
  5. J-S Guo, C-Y Wang, C-Y Huang, and C-H Tsai, “A Hysteretic Boost Regulator using Emulated Ramp Feedback(REF) Control for LED Drivers," in Proc. VLSI Design/CAD Symposium, 2013.
  6. S-M Lin, and C-H Tsai, “Fast Transient Current Mode DC-DC Buck Converter with Optimized Loop Reponse," in Proc. VLSI Design/CAD Symposium, 2013.
  7. Y-C Chang and C-H Tsai, “Predictive Digital Current Mode Controlled DC-DC Converter with Duty Calibration Technique," in IEEE International Future Energy Electronics Conference, 2013, pp. 316-319.
  8. C-Y Huang, S-F Kang, and C-H Tsai, “Design and Implementation of a Current-Mode DC-DC Converter for LED Driving," in IEEE International Future Energy Electronics Conference, 2013, pp. 436-439.
  9. B-T Yeh, C-H Yang, K-C Juang, and C-H Tsai, “Sensorless Dead-Time Exploration for Digitally Controlled Switching Converters," in IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2013, pp. 1-4.
  10. C-Y Wang, J-H Guo, and C-H Tsai, “A High Effieciency Adaptive Off/On-Time Control DC/DC Boost Regulator,” in Proc. VLSI Design/CAD Symposium, 2012.
  11. C-S Huang, J-H Wang, C-Y Wang and C-H Tsai, “A Fast-Transient Quasi-V2 Switching Buck Regulator Using AOT Control,” in Proc. VLSI Design/CAD Symposium, 2011.
  12. C-N Liu, C-W Huang and C-H Tsai, “Direct Digital Compensator Design and IC Implementation of DC-DC Converter,” in Proc. VLSI Design/CAD Symposium, 2011.
  13. J-H Shiau, C-H Yang, and C-H Tsai, “Current-Sensorless Multi-Mode Digital DC-DC Controller for Portable Applications,” in Proc. VLSI Design/CAD Symposium, 2011.
  14. S-W Lai, C-H Tsai, “PSR Enhancement of Low-Dropout Regulator with 5-bit Programmable Output Using a Tail Current Control Circuit,” in Proc. VLSI Design/CAD Symposium, 2010.
  15. C-C Yeh , J-H Wang and C-H Tsai, “A Low Static Current Tail Current Control Output Buffer for TFT-LCD ,” in Proc. VLSI Design/CAD Symposium , 2010.
  16. C-H Yang, C-W Mu, and C-H Tsai, “Synthesizable Wide Range DPWM with All-Digital PLL for Digitally-Controlled Switching Converter,” in IEEE Industrial Electronics Conference, 2011, pp. 1626-1630.
  17. Y-T. Chang, R-L Lin and C-H Tsai, “Voltage-Loop Compensator Design of Current-Mode CCM Double-Input DCDC Converter for High/Low Voltage Sources,” in Proc. Power Electronics Conf. , pp. 524-529, 2009.
  18. C-W Mu, R-L Lin and C-H Tsai, “Voltage-Loop Compensator Design of Current-Mode Boost Converter with High Step-up Ratio,” in Proc. Power Electronics Conf. , pp. 518-523, 2009.
  19. C-N Liu, R-L Lin and C-H Tsai, “Voltage-loop Compensator Design for Current-mode Buck-Buck Converter with High Step-down Ratio,” in Proc. Power Electronics Conf. , pp. 547-552, 2009.
  20. Y-J. Chen, R-L Lin and C-H Tsai, “Voltage-loop Compensator Design for Current-mode Buck-Boost Converter with Low Output Voltage Ripple,” in Proc. Power Electronics Conf. , pp. 536-541, 2009.
  21. W-H Chang, Y-H Jen and C-H Tsai, “An Integrated Sigma-Delta Noise-Shaped Buck Converter,” in IEEE Power Electronics and Drive Systems, 2009, pp. 18-21.
  22. Z-Y Zeng, H-Y Zheng, C-H Tsai, “A Low Dropout Linear regulator with High Power Supply Rejection,” in Proc. VLSI Design/CAD Symposium, Aug. 2008.
  23. H-Y Chu, C-H Yang, C-W Leng, and C-H Tsai, “A Top-Down, Mixed-Level Design Methodology for CT BP ΔΣ Modulator Using Verilog-A,” in IEEE Asia-Pacific Conference on Circuits and Systems, 2008, pp. 1390-1393.
  24. C-M. Pan, C-H Tsai, “An Embedded 10-bit 200MHz DAC IP with Self-Calibrating Current Bias for SoC Applications,” in Proc. VLSI Design/CAD Symposium, Aug. 2007.
  25. Y-H Jen, H-Y Zheng, R-L Lin, C-H Tsai, “Voltage Mode Compensator Design for Four Phase Interleaving Buck Converter,” Symposium on Electrical Power Engineering, 2007.
  26. W-H Chang, Z-Y Zeng, R-L Lin,C-H Tsai,“A Compensator Design for VRM With a Current Sharing Control” in Proc. Power Electronics Conference, 2007., “A Compensator Design for VRM With a Current Sharing Control,” Symposium on Electrical Power Engineering, 2007.

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